Samsung to Showcase Upgraded HBM4 at ISSCC 2026

Samsung aims to secure a solid foothold in the AI hardware market with its 6th-generation high-bandwidth memory, HBM4. The company is gearing up to showcase an upgraded version of this cutting-edge chip at the International Solid-State Circuits Conference (ISSCC) in February 2026. The new memory delivers 1.4 times higher bandwidth than its earlier HBM4 product.

Samsung boosts AI memory strategy with higher-bandwidth HBM4

Last month, Samsung revealed its HBM4 at the 27th Semiconductor Exhibition (SEDEX 2025) in Seoul. The chip uses a new 10nm-class sixth-generation (1c) process for improved power efficiency and performance. It comes with 36GB of capacity and 2.4 terabytes per second (TB/s) of bandwidth. Now, for ISSCC 2026, the company is preparing an even faster version. While the upgraded HBM4 keeps the same 36GB capacity, it increases bandwidth to 3.3TB/s. This shows the company’s eagerness to meet the growing demands of powerful AI systems.

Samsung struggled to compete in the HBM market during the HBM3E era because of delayed quality certification from its major customer, Nvidia. As a result, its market share difference widened against industry leader SK Hynix. The good news is that Samsung is now on track to catch up after entering Nvidia’s supply chain. The company aims to start shipping HBM4 to Nvidia as early as the second quarter of 2026.

While Samsung has yet to finalize an HBM4 supply agreement with Nvidia, it is confident that this time it won’t face certification delays. The two companies have already reached the price negotiation stage, with Samsung seeking a price in the mid-$500 range per unit, similar to SK Hynix. Furthermore, the company is boosting production of its 1c DRAM process, with reportedly plans to reach about 150,000 wafers per month by the end of next year.

Meanwhile, at ISSCC, SK Hynix is preparing to showcase its 24Gb GDDR7, capable of reaching 48Gb/s per pin. The memory uses a symmetrical dual-channel design that allows simultaneous read and write operations.