Samsung to Make Ubitium’s Universal RISC-V Processor

Samsung has scored a major win in its semiconductor business with its older process. The company will make a universal RISC-V chip using an 8nm node for the German startup Ubitium. The tape-out was finished in December 2025.

Ubitium tapes out first universal RISC-V chip with Samsung 8nm

While Samsung is suffering losses in its foundry business, the 2nm era looks promising for the company. Clients like Tesla could play a key role in restoring the semiconductor business. At the same time, older, mature processes like 8nm continue to attract customers. As such, the Korean firm’s fab utilization rate is expected to reach around 60% in the first half of 2026.

In a blog post, Ubitium announced that it taped out the first silicon of its universal microprocessor architecture on Samsung’s 8nm process. For the uninitiated, tape-out in semiconductor means the chip design is complete and ready for manufacturing. This tape-out confirms the main components of Ubitium’s design, including the Universal Processing Array with runtime reconfiguration and the LPDDR5 memory interface. The company also plans a second tape-out later this year, with mass production sometime in 2027.

“Advanced-node silicon delivery depends on disciplined back-end execution across timing, power, and signoff,” said Jun-Kyu Park, CEO of ADTechnology. “We are pleased to have supported Ubitium throughout the implementation process as it progressed to tape-out on Samsung Foundry’s 8nm process.”

Ubitium’s universal processor aims to simplify embedded computing. Today’s robots, drones, and industrial machines often use a bunch of specialized processors, each with its own software stack and tools. The universal RISC-V chip will replace many of these processors with a single solution, reducing both cost and complexity.

Built on the open-source RISC-V architecture, the processor can run Linux and RTOS simultaneously. Moreover, it can process radar and audio signals in real time while executing AI workloads at the edge. This eliminates the need for separate accelerators or coprocessors.